.ALIASES
R_R25           R25(1=N704348 2=0 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS710950@ANALOG.R.Normal(chips)
E_GAIN1          GAIN1(OUT=N11361 IN=N10734 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711194@ABM.GAIN.Normal(chips)
L_LOL           LOL(1=N707019 2=N10734 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711438@ANALOG.L.Normal(chips)
R_R5            R5(1=N11778 2=N11880 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS710972@ANALOG.R.Normal(chips)
V_V7            V7(+=N704342 -=0 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711460@SOURCE.VDC.Normal(chips)
C_Cout          Cout(1=0 2=N10374 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS710992@ANALOG.C.Normal(chips)
R_Resr          Resr(1=N10374 2=VOUT ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711480@ANALOG.R.Normal(chips)
R_R26           R26(1=N704342 2=0 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711242@ANALOG.R.Normal(chips)
C_C3            C3(1=N10450 2=N705632 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711008@ANALOG.C.Normal(chips)
R_Rupper          Rupper(1=N10450 2=VOUT ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711500@ANALOG.R.Normal(chips)
R_R31           R31(1=N704390 2=0 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711262@ANALOG.R.Normal(chips)
V_V10           V10(+=N704378 -=0 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711024@SOURCE.VDC.Normal(chips)
X_U14           U14(A=N10344 C=N11778 P=0 D=N11361 ) CN @CHAPTER 2_1.test buck open-loop
+VM(sch_1):INS711520@PWMSWITCH.PWMVM.Normal(chips)
V_Vref          Vref(+=N10440 -=0 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711284@SOURCE.VDC.Normal(chips)
V_Vstim          Vstim(+=N14602 -=0 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711046@SOURCE.VAC.Normal(chips)
V_V11           V11(+=N704390 -=0 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711304@SOURCE.VDC.Normal(chips)
R_R3            R3(1=N705632 2=VOUT ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711068@ANALOG.R.Normal(chips)
X_U10           U10(1=N10440 5=N10450 7=ERR ) CN @CHAPTER 2_1.test buck open-loop
+VM(sch_1):INS711554@APPLICATION.AMPSIMP.Normal(chips)
R_R1            R1(1=N707019 2=ERR ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711326@ANALOG.R.Normal(chips)
R_Rlower          Rlower(1=0 2=N10450 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711090@ANALOG.R.Normal(chips)
R_R2            R2(1=N7113541 2=N10450 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711344@ANALOG.R.Normal(chips)
R_Rload          Rload(1=0 2=VOUT ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711110@ANALOG.R.Normal(chips)
V_Vin           Vin(+=N10344 -=0 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711364@SOURCE.VDC.Normal(chips)
V_V9            V9(+=N704348 -=0 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711130@SOURCE.VDC.Normal(chips)
C_C2            C2(1=ERR 2=N10450 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711384@ANALOG.C.Normal(chips)
L_L1            L1(1=VOUT 2=N11880 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711152@ANALOG.L.Normal(chips)
R_R22           R22(1=N704354 2=0 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS710912@ANALOG.R.Normal(chips)
C_C1            C1(1=ERR 2=N7113541 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711400@ANALOG.C.Normal(chips)
R_R30           R30(1=N704378 2=0 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711172@ANALOG.R.Normal(chips)
V_V8            V8(+=N704354 -=0 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS711416@SOURCE.VDC.Normal(chips)
C_COL           COL(1=N10734 2=N14602 ) CN @CHAPTER 2_1.test buck open-loop VM(sch_1):INS710934@ANALOG.C.Normal(chips)
_    _(err=ERR)
_    _(vout=VOUT)
.ENDALIASES
